发明名称 RESET CONTROL SYSTEM
摘要 <p>PURPOSE:To easily reset each group or the whole groups by providing an I/O device with a reset switch and a selection switch and providing an I/O interface with a reset control circuit. CONSTITUTION:The title system consists of the I/O device 12, an I/O interface 13 connected between the I/O device 12 and plural grouped CPU groups 11a, 11b,... the reset switch 25 arranged in the I/O device 12, the selection switch 26 arranged in the I/O device 12 to select each group of the CPU groups 11a, 11b,... or the whole groups 11, and the reset control circuit arranged in the I/O interface to consider the combination of instructions based on the reset switch 25 and the selection switch 26 or output a reset signal. Consequently, the individual reset of the CPU groups 11a, 11b,... or the simultaneously reset of the whole groups can be easily executed.</p>
申请公布号 JPH01234965(A) 申请公布日期 1989.09.20
申请号 JP19880060467 申请日期 1988.03.16
申请人 FUJITSU LTD 发明人 IHI TOSHIAKI;HASHIMOTO SHIGERU;SUGIMURA YOSHIYASU
分类号 G06F15/16;G06F1/00;G06F1/24;G06F15/177 主分类号 G06F15/16
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