发明名称 |
Mask rom with spare memory cells. |
摘要 |
<p>A main ROM cell array (11 and 12) is divided into a plurality of blocks, and a spare memory cell group (20) is arranged apart from the main ROM cell array (11 and 12). The spare memory cell group (20) uses bit lines or word lines different from those of the main memory cell array and includes spare memory cells which are different in structure from the memory cells of the main memory cell array (11 and 12). The number of the memory cells of the spare memory cell group (20) is the same as that of the main memory cells of one row or column in each block of the main memory cell array (11 and 12), and data can be programmed into the spare memory cells after the completion of the manufacturing process. The operation of programming data into the spare memory cells of the spare memory cell array (20) is effected by use of a write-in address buffer (22) and a write-in decoder (21). When a row or column including a defective memory cell is designated in the main memory cell array (11 and 12), the row or column of the spare memory cells in the spare memory cell group (20) is activated.</p> |
申请公布号 |
EP0333207(A2) |
申请公布日期 |
1989.09.20 |
申请号 |
EP19890104787 |
申请日期 |
1989.03.17 |
申请人 |
KABUSHIKI KAISHA TOSHIBA;TOSHIBA MICRO-COMPUTER ENGINEERING CORPORATION |
发明人 |
TAKIZAWA, MAKOTO C/O PATENT DIVISION;IWASE, TAIRA C/O PATENT DIVISION;ASANO, MASAMICHI C/O PATENT DIVISION;ARIME, YASUNORI C/O PATENT DIVISION |
分类号 |
G11C29/00 |
主分类号 |
G11C29/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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