| 摘要 |
PURPOSE:To make it possible to reduce the number of connected points of the title integrated circuit device when it is mounted on a printed substrate and the like by a method wherein, for the semiconductor wafer whereon a large number of integrated circuits to be divided as chips are formed, an interwiring is provided on a plurality of adjacently positioned integrated circuits if necessary, and a plurality of integrated circuit regions are cut out as chips. CONSTITUTION:Each of integrated circuits 11 and 12 is brought into a state wherein it can be cut as a chip through an element formation process, a wiring formation process and a passivation process in accordance with the ordinary integrated circuit manufacturing technique. The integrated circuits 11 and 12 have electrode terminals 2 respectively which are used as bonding pads. There are chip-enabling terminals CE, address terminals A0 and A1..., input and output terminals I/O1, I/O2... and the like in the above-mentioned terminals 2. Said two integrated circuits 11 and 12 are interconnected and interwired between the terminals to be common-connected in the wafer state. After two memory regions have been interwired in the wafer state, the wafers are cut at the positions of A-A, B-B, C-C and D-D and a memory integrated circuit chip 8 is obtained.
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