发明名称 TIMING SYSTEM
摘要 PURPOSE:To simplify a circuit constitution by inputting the output signal of N latch circuits and inverting the phase of a latch clock signal when a coincidence detection circuit detects discordance. CONSTITUTION:A coincidence detection circuit 109 always decides the coincidence of outputs of D-F/F/1031, 1032 and judges that the output of the EX-OR gate 107 exists in the vicinity of the change point of a data input 101 when cordance is detected even once to invert the phase of the output signal of the EX-OR gate 107 automatically and the inverted clock signal is used to identify the data input 101 by using the inverted clock signal. The leading edge of the inverted clock appears when the data input is made stable to be a prescribed state, then it is possible to apply the retiming of the data input 101 without any error by using the clock signal, resulting that the data signal synchronously with the clock signal of the clock output line 111 appears on the data output line 110. Thus, the retiming of the data signal is attained without any error by having only to use a simple logic operation.
申请公布号 JPH01233850(A) 申请公布日期 1989.09.19
申请号 JP19880060889 申请日期 1988.03.14
申请人 NEC CORP 发明人 YOSHIDA TOKUO
分类号 H04L7/02 主分类号 H04L7/02
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