发明名称 N-BIT COUNTER APPARATUS
摘要 A method of sampling accurately the instantaneous content of a high speed counter without interrupting the counting process is provided. The method is applicable even when the higher order digits of the counter are constructed by slower switching circuits configured in either a synchronous or ripple-through arrangement. The switching and carry propagation times of these higher order counters need not be shorter than the time between successive events being counted. Sampling of the contents may be made repeatedly in the interim without affecting the totality of the final count.
申请公布号 DE3479373(D1) 申请公布日期 1989.09.14
申请号 DE19843479373 申请日期 1984.03.07
申请人 HEWLETT-PACKARD COMPANY 发明人 CHU, DAVID CHAU-KWONG;WARD, MICHAEL J.
分类号 H03K21/40;H03K21/00;H03K21/12;(IPC1-7):H03K21/12 主分类号 H03K21/40
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