发明名称 Direct memory access controller.
摘要 <p>A direct memory access controller coupled to a system bus (36, 37, 38) of a system including a memory (2, 3), for controlling a data transfer by a direct memory access, includes a register (11) registering a code which designates one of a plurality of descriptor formats, each of which defines both the number and type of descriptors necessary for the data transfer by the direct memory access, a group of registers (19 - 23) for registering descriptors defined in one of the descriptor formats which is selected by the code registered in the register, a controller (16 - 18) for controlling the data transfer by the direct memory access in accordance with the descriptors defined in the selected one of the descriptor formats registered in the register (11).</p>
申请公布号 EP0332151(A2) 申请公布日期 1989.09.13
申请号 EP19890104032 申请日期 1989.03.07
申请人 FUJITSU LIMITED 发明人 TANIAI, TAKAYOSHI;FUJIHIRA, ATSUSHI
分类号 G06F13/28 主分类号 G06F13/28
代理机构 代理人
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