| 摘要 |
<p>This invention relates to a bi-polar transistor structure constituting an active element in a superhigh speed logic integrated circuit, and a process for producing the same. The bi-polar transistor structure has a substantially coaxial symmetric structure in plan, wherein single crystal active layers as base and collector regions have respective peripheries surrounded in the whole or in significant part by and directly connected with respective polycrystalline electrode layers. The polycrystalline electrode layers are separated from each other by insulating layers provided therebetween. The first process for producing a bi-polar transistor structure uses only thin film forming techniques and etching techniques in such a way as to dispose the active layers, an emitter electrode layer, parts of the other electrode layers and parts of the insulating layers inside a recess formed in an insulating layer formed on a substrate. The first process needs no complicated techniques of registration control and dimensional control as involved in widely used photoetching techniques. The second process for producing a bi-polar transistor structure uses a photoetching technique by which polycrystalline layers for base and collector electrodes are subjected to patterning. Around the patterned polycrystalline electrode, side wall insulating layers are formed in the respective later steps. The second process enables no photoetching technique to be used in the contact step for wirings and permits contact regions to be formed in self-alignment. Further, the second process involves no step of selective oxidation by a heat treatment at a high temperature.</p> |
