发明名称 Logic simulation method and apparatus.
摘要 Determining the operation of a logic circuit through calculation is generally called logic simulation. Especially, in event driven type logic simulation, signal status changes at input and output terminals of an element of the logic circuit are deemed as events and only for an element in which an event occurs at its input terminal, the signal status at its output terminal is calculated. In the event driven type logic simulation, a series of signal status changes externally applied to the logic circuit is stored, as injection events, in a memory of a logic simulation apparatus. If injection events are all stored in the memory before execution of the simulation or injection events are stored in the memory by temporarily stopping the simulation after start thereof, most of memory capacity is consumed by the injection events or simulation speed is degraded. To solve this problem, an identifier (called color) is added to an event and when an injection event is injected, the injected event is associated with auxiliary time representing a minimum of values of event times of injection events expected to be injected after injection of that injected event. Color and auxiliary time are used to permit execution of the simulation in parallel with injection of injection events.
申请公布号 EP0332362(A2) 申请公布日期 1989.09.13
申请号 EP19890302194 申请日期 1989.03.06
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 KANAZAWA, KIYOSHI
分类号 G06F11/25;G06F17/50;G06F19/00 主分类号 G06F11/25
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