发明名称 Multiprocessor system and control method therefor
摘要 A multiprocessor system is configured so as to effect a bidirectional data transfer among a plurality of processors through a data buffer of a plurality of bytes to which transfer data can be written and from which it can be read. The system is provided with mode storage means of which contents are rewritten by at least one of the plurality of processors and for storing mode information indicating that write/read operation of transfer data in the data buffer means by the one processor is controlled based on DMA system or interrupt system, condition storage means for storing information as to whether write and read operations of transfer data in the data buffer means by the one processor are in an allowed condition or not, and selector means operative to output either a DMA request signal or an interrupt request signal on the basis of storage contents of the mode storage means and the condition storage means, and a DMA controller wherein when the DMA request signal is given, the DMA controller is operative to control write/read operation of transfer data in the data buffer means by the one processor based on the DMA system, whereby when the interrupt request signal is given, the one processor is operative to control write/read operation of transfer data in the data buffer means based on the interrupt system.
申请公布号 US4866597(A) 申请公布日期 1989.09.12
申请号 US19850727828 申请日期 1985.04.26
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 KINOSHITA, KIYOSHI
分类号 G06F12/00;G06F13/38;G06F15/167 主分类号 G06F12/00
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