| 摘要 |
<p>PURPOSE:To eliminate a need of a packet transfer circuit, which is conventionally required for each input/output bus, to simplify the constitution and the control of switching by arbitrating the packet transmission or reception right between circuits connected through each input bus or output bus. CONSTITUTION:Each of input circuits 2101-210n has a data processing part 211, a buffer memory part 213, and a transmission right acquisition control part 215. The transmission right acquisition control part 215 which arbitrates the packet transmission right of an input bus 205 between input circuits controls the buffer memory part 213 to transmit a transmission queuing packet after acquiring the packet transmission right. Thus, the output bus is directly controlled by a prescribed input circuit to simplify the packet switching control.</p> |
