发明名称 MANUFACTURE OF VERTICAL MOS TRANSISTOR
摘要 PURPOSE:To eliminate the need for a photolithographic process for obtaining the ohmic connection of a channel forming region and a source electrode, and to reduce manufacturing cost by a method wherein the specified region of a channel forming section is masked, an impurity is diffused selectively and a source region is formed and a reverse conductivity type impurity is diffused in high surface concentration. CONSTITUTION:An oxide film 3 and an electrode layer 4 are laminated onto one conductivity type Si substrate and a gate is juxtaposed, and a reverse conductivity type impurity is introduced into the substrate 1, using the gate as a mask to shape a channel forming region 5. The specified region of the channel forming region 5 is masked, and one conductivity type impurity is diffused selectively to form a source region 6 shallower than the channel forming region 5, and an inter-layer insulating film 7 is shaped. A contact window for connecting the channel forming region 5 and the source region 6 is formed, and the reverse conductivity type impurity is diffused in surface concentration higher than that of the channel forming region 5 and lower than that of the source region 6, thus forming a region 2 brought into ohmic-contact with the source region 6 and the channel forming region 5.
申请公布号 JPH01227476(A) 申请公布日期 1989.09.11
申请号 JP19880054258 申请日期 1988.03.08
申请人 MATSUSHITA ELECTRON CORP 发明人 TANIDA HIROSHI;KITAMURA KAZUYOSHI
分类号 H01L29/78;H01L21/336;H01L29/10 主分类号 H01L29/78
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