| 摘要 |
<p>Means are provided which aid in generating programmes for testing digital modules. Formal hierarchical descriptions (e.g. in Prolog) of the module without and with a defined fault are stored in a storage device (10) comprising two stores (12 and 13), backed up by a submodule store (14). The two module descriptions are fed into registers (15 and 16). Then, repeatedly, (a) an unfolding processor (17) works down the hierarchy, (b) a simplification processor (18) simplifies the descriptions using a variety of logical and arithmetical rules, and (c) a discrimination condition extraction processor (19) extracts discrimination conditions which are common to both module descriptions and necessary (i.e. must be satisfied as part of the final test programme). Processor (19) has discrimination condition storage means (21) and discrimination condition consistency checking means (22) coupled to it. Units (18, 19 and 22) use common rules, stored in a logical rules store (23), which rely heavily on expressions of the if-then-else form. Processor (18) may allow operator intervention so that the operator may guide and/or perform certain simplifications and/or their order. Thus a sequence of discrimination conditions is found, acting to gradually focus down onto the point where the two modules - sound and faulty - differ. (From these, it is then straightforward to generate an actual test programme.)</p> |
