发明名称 DATA TRANSFER SYSTEM FOR HIERARCHICAL TYPE MULTIPROCESSOR
摘要 PURPOSE:To speed up data transfer between separated hierarchical processors by providing respective processors with by-pass switches in a hierarchical type multiprocessor system. CONSTITUTION:At the time of starting a processor group in a 3rd layer, a host 11 turns on the by-pass switches 3 of the processors in 1st and 2nd layers through a control bus 6. Since the processor of the 3rd layer is directly connected to a data bus 5 through the by-pass switches 3 of the processors of the 1st and 2nd layers, a starting program can be directly transferred through the data bus 5. Thereby sequential data transfer for transferring data from the host to the 1st layer processor and from the 1st layer processor to the 2nd layer processor can be omitted and data transfer can be rapidly executed.
申请公布号 JPH01226067(A) 申请公布日期 1989.09.08
申请号 JP19880052016 申请日期 1988.03.04
申请人 FUJITSU LTD 发明人 INOUE KOICHI;ISHIHATA HIROAKI;IKEZAKA MORIO
分类号 G06F15/16;G06F15/173;G06F15/177 主分类号 G06F15/16
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