In this circuit arrangement, in which an output signal is to be output when a pulse or a sequence of pulses exceeds a predetermined duration during a predetermined measuring period, a counter is connected at the output end to a comparator which can be supplied with a predetermined count. The output signal can be picked up at an output of the comparator. The counter can be supplied with a clock signal in dependence on an enable signal and a reset signal which can be derived from the pulses with the aid of a switch-over device.
申请公布号
DE3806102(A1)
申请公布日期
1989.09.07
申请号
DE19883806102
申请日期
1988.02.26
申请人
BLAUPUNKT-WERKE GMBH, 3200 HILDESHEIM, DE
发明人
FISCHER, HANS-JUERGEN;GLASER, JUERGEN, 3200 HILDESHEIM, DE