发明名称 SIMPLE TEST DEVICE FOR DATA PROCESSING CIRCUIT
摘要 PURPOSE:To attain the miniaturization and a high-speed operation of a simple test device, by using a circuit which can select freely an address, a timing signal and a data respectively. CONSTITUTION:A data is latched to a latching circuit 6 when the AND conditions are satisfied between an address and a timing signal and with a latch timing signal produced from a latch timing producing circuit 3. This data is displayed at a block which displays the results of 28 channels of a display circuit 9 or counted by a counter 7 to be displayed at a block which displays the counting result of channels of a 16-notation counter 7. It is discriminated by the function of the counter 7 whether or not the same ratio is secured for the generating frequency of a phenomenon within a fixed time. This enables the confirmation and test of data. This data is possible also with a single data having no designation of address.
申请公布号 JPS58182764(A) 申请公布日期 1983.10.25
申请号 JP19820065043 申请日期 1982.04.19
申请人 MEIDENSHA KK 发明人 KURIMOTO TAKATSUGU;KANEDA HOUJIYUN;UYAMA YOSHITAKA
分类号 G06F11/22 主分类号 G06F11/22
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