发明名称 AMORPHOUS SILICON THIN FILM TRANSISTOR ARRAY SUBSTRATE AND ITS PRODUCTION
摘要 <p>PURPOSE:To reduce the film peeling or disconnection of a source wiring in the vicinity of a terminal part by forming a gate insulating layer on the lower layer or a source wiring terminal part. CONSTITUTION:A gate insulating layer 2 based upon silicone nitride, an amorphous silicon layer 3 and a protecting insulation layer 4 based upon silicon nitride are stacked on an insulating substrate 1 on which a gate electrode 9 and a gate wiring 8 are formed. Respective layers are stacked so as to mask only a gate wiring terminal part 7 by means of a metal mask. The protecting insulation layer 4 is etched so that only a TFT part is left, a silicon layer 10 containing n-type impurity is stacked and then a metallic layer 11 is stacked. The metallic layer 11 is patterned so as to form a source electrode and a drain electrode and then masked and the amorphous silicon layer 3 and the n-type silicon layer 10 are removed by etching. Then, a transparent conductive layer 6 is stacked and selectively removed by etching to form a source wiring 12 and a picture element electrode 13. Since a source wiring terminal part 5 is formed on the gate insulating layer 2, the film peeling, disconnection, etc., of the source wiring in the vicinity of the source wiring can be sharply reduced.</p>
申请公布号 JPH01217421(A) 申请公布日期 1989.08.31
申请号 JP19880043575 申请日期 1988.02.26
申请人 SEIKOSHA CO LTD 发明人 TANAKA SAKAE;WATANABE YOSHIAKI
分类号 H01L23/52;G02F1/136;G02F1/1368;H01L21/31;H01L21/3205;H01L21/336;H01L21/77;H01L21/84;H01L27/12;H01L29/78;H01L29/786 主分类号 H01L23/52
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