| 摘要 |
<p>PURPOSE:To shorten the developing period of a DSP for a special utility by incorporating a functional block cell for forming the DSP, and a general logic cell for forming a logic gate in one chip, selecting the cell by later wirings, altering internal specifications, and forming the gate. CONSTITUTION:The state as shown at a stage of finishing a master step is of a state in which a self-matching step of implanting an impurity by a polysilicon gate and its diffusing step are finished, and a transistor is formed of all function cell regions 1 and a logic cell general use cell region 2. For example, when the bit width (n) of each cell of the cell region 1 is n=16, a multiplier 11 indicated by shade, an ALU 13, an accumulator 14 and a resistor 16 of the cells are used in a 16 bit width, thereby forming the DSP. The unused cells can be used as a data bus region and the wiring region of wirings 20 to the exterior.</p> |
