发明名称 Arrangement for processing the output signals of a resistance bridge
摘要 The invention relates to an arrangement for processing the output signals of a resistance bridge supplied with a DC voltage or a direct current with periodically reversed polarity. The arrangement further comprises a clock generator furnishing a clock signal controlling said reversal. The output signal of the resistance bridge is amplified in a bridge amplifier and supplied to a voltage-frequency converter with signal and reference inputs. The output frequency of said voltage-frequency converter is the output signal of the arrangement. The instantaneous bridge supply is used as reference for the voltage-frequency converter and the reversal of the polarity of the bridge supply is synchronized with the output frequency. The measurement of the output frequency in the following evaluating units takes place in such a manner that the mean value is formed over a whole number of reversal clock periods.
申请公布号 US4862382(A) 申请公布日期 1989.08.29
申请号 US19870100589 申请日期 1987.09.24
申请人 ENDRESS U. HAUSER GMBH U. CO. 发明人 SCHNEIDER, GEORG;BAUSCH, MARKUS
分类号 G01R17/12;G01R17/10 主分类号 G01R17/12
代理机构 代理人
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