发明名称
摘要 PURPOSE:To make the circuit constitution simple to eliminate adjusting positions by using a digital IC in a control system. CONSTITUTION:A delayed wave selecting circuit 10 selects a received wave (b) or a delayed wave (c) from a delayed wave generating circuit 8 after power on and sends it as a signal (d) to a delayed wave selection control circuit 9 and an AND circuit 11. The delayed wave selection control circuit 9 is provided with an AND circuit and monitors always the signal (d) selected by the delayed wave selecting circuit 10 and a reference signal (a) from a reference wave oscillating circuit 6; and if the AND condition is met between the rise and the fall of the reference signal (a) and the rise of the signal (d), that is, only when both signals are inputted simultaneously, the circuit 9 gives the output. That is, if the delay of the signal (d) to the reference signal (a) is positive or negative integer-fold phase delay of 0 deg. or 180 deg., the circuit 9 gives a signal to the delayed wave selecting circuit 10, and the delayed wave selecting circuit 10 changes the signal of the received wave (b) or the signal of the delayed wave (c) having a phase delay of 90 deg. to the received wave (b) which is sent to the delayed wave selection control circuit 9 and the AND circuit 11 till now.
申请公布号 JPH0140299(B2) 申请公布日期 1989.08.28
申请号 JP19830129551 申请日期 1983.07.18
申请人 KUBOTA TETSUKO KK;KUBOTA TOREEN KK 发明人 ADACHI HARUHIKO
分类号 G01F1/32 主分类号 G01F1/32
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