发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT AND SEMICONDUCTOR CHIP
摘要 PURPOSE:To prevent break-down of a transistor(TR) by clamping a base input voltage to a prescribed constant voltage by a clamp circuit or a reference voltage generating circuit when an abnormal external voltage is inputted to a base input of the TR in error. CONSTITUTION:When a voltage inputted to a base of a TR Q1 is within a conventional voltage range, a prescribed normal operation is attained. That is, when a voltage higher than a constant voltage +VBE is inputted due to any cause, the base input voltage is suppressed to (constant voltage - clamp voltage) by the clamp circuit 1. As a result, the base-emitter voltage of the TR Q, is suppressed below the break-down voltage.
申请公布号 JPH01212915(A) 申请公布日期 1989.08.25
申请号 JP19880038028 申请日期 1988.02.19
申请人 FUJITSU LTD 发明人 SAKAI TOSHIAKI;OGAWA MASAMI
分类号 H03K19/086;H03K19/003 主分类号 H03K19/086
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