| 摘要 |
PURPOSE:To always keep the constant phase relation of data and a clock by providing a polarity inverting circuit to a phase variable circuit, a frequency dividing circuit, a phase shifting quantity detecting circuit, and a phase shifting direction detecting circuit. CONSTITUTION:A clock input 2 is divided into 1/2 with a frequency divider 5, an AND processing 7a is applied to the result together with a data input 1, a level difference with the making ratio of its own data 1 is found through a marking ratio correcting circuit 6 and an operation amplifier 8a, and a phase shifting quantity detecting 14 is applied. Besides, a positive, negative logic output through the divided 5 clock, the data 1 and a buffer circuit 10 is processed at AND circuits 7b and 7c, respectively, and a direction judgment 15 of a phase shift is executed through an operation amplifier 8b. A phase shifting quantity detecting signal is used as an input, and an inversion circuit 9 is controlled by a direction judging signal, and a phase variable circuit 4 is controlled with an output PS1. By such constitution, the phase relation of the data and the clock can be always constant. |
