发明名称 DPSK MODULATION HETERODYNE DETECTION SYSTEM
摘要 PURPOSE:To avoid an eye pattern used for identification from being a form such as an RZ code waveform and to eliminate the deterioration of an S/N by retarding one of branched intermediate frequency signals by one bit in delay detection and comparing the phase after the phase is inverted. CONSTITUTION:When an intermediate frequency signal from a detection circuit 9 is inputted to a delay detection circuit 10, the intermediate frequency signal is divided into two, one is inverted for the phase by a phase inversion circuit 103, the result is retarded by one bit at a delay circuit 101, inputted to a mixer 102, and the other is inputted directly to the mixer 102, the mixer 102 compares the phase of the intermediate frequency signal from the delay circuit 9 with the phase retarded by the delay circuit 101 and inverted by a phase inversion circuit 103 and a base band signal is outputted. In this case, the phase difference with a signal of one preceding bit does not reach an H level on the way of alternate transition from pi to -pi or -pi to pi and the eye pattern used for the identification is not formed to be an RZ code waveform.
申请公布号 JPH01212932(A) 申请公布日期 1989.08.25
申请号 JP19880038023 申请日期 1988.02.19
申请人 FUJITSU LTD 发明人 NAITO TAKAO;CHIKAMA TERUMI;ONAKA HIROSHI;MIYATA HIDEYUKI
分类号 G02F2/00;H04B10/07;H04B10/2507;H04B10/516;H04B10/61;H04L27/22 主分类号 G02F2/00
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