发明名称 REGISTER POINTER CIRCUIT
摘要 PURPOSE:To improve the efficiency of a status polling by continuously reading a status register without repeating the setting when the same status register is read with three FFs. CONSTITUTION:When a hardware resetting signal 35 becomes H, all the outputs of respective pointer unit circuits 101-104 become L. Simultaneously, respective outputs of FF 41-43 become L, H and L, and even after the signal 35 is returned to L, these initial states are held. Thereafter, a pointer to select a status register to be read to respective circuits 101-104 by a writing signal 36 is set, next, a reading signal 37 is inputted, a change is absent at the output of an inverter 2 and therefore, transfer gates 11-13 are in an off state and the no change is at the pointer contents of respective circuits 101-104. But, a reading action is stored by the signal 37 with an FF 41. Thereafter, even when the signal 37 is returned to the L, the contents of the pointer are kept as they are, and therefore, next, when the reading action is executed, the same pointer can be read.
申请公布号 JPH01211141(A) 申请公布日期 1989.08.24
申请号 JP19880036854 申请日期 1988.02.19
申请人 NEC CORP 发明人 ISHIKAWA YUTAKA
分类号 G06F12/00;G06F7/00 主分类号 G06F12/00
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