| 摘要 |
An isolation structure for isolating a pilot device from the main device of a monolithic semiconductor device. The isolation structure comprises a pair of spaced isolation channels separating the pilot device from the main device. An electrode insulatively disposed over the region between the two isolation channels is shorted by a metallization layer to the isolation channel closest to the pilot device. In this manner, parasitic transistor turn on of the isolation structure is prevented.
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