发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 <p>PURPOSE:To ensure a highly reliable operation for an address buffer circuit by a method wherein a noise generated in the output buffer circuit in operation is prevented from entering the address buffer circuit in a device provided with an output buffer circuit and address buffer circuit connected to one and the same bonding pad. CONSTITUTION:First power source wirings 13 and 15 to supply prescribed power voltages to a second address buffer circuit and second power source wirings 12 and 14 to supply prescribed power voltages to a second output buffer circuit arc provided. Accordingly, even in an asynchronous system wherein the read of address signals and that of data signals are performed not timed to each other, a power source noise, which is generated in the power source wirings 12 and 14 owing to a current through an output buffer circuit (MISFETs 360 and 370) in operation in a selective input/output circuit 300, will not enter the power source wirings 13 and 15 for an address buffer circuit (MISFETs 330 and 340) in the selective input/output circuit 300 and cause the address buffer circuit to operate erroneously. In this way, an address buffer circuit, connected to a bonding pad 5 whereto an output buffer circuit is connected, is ensured of a reliable operation.</p>
申请公布号 JPH01206663(A) 申请公布日期 1989.08.18
申请号 JP19880030728 申请日期 1988.02.15
申请人 HITACHI LTD 发明人 SHIBATA TAKASHI
分类号 G11C17/00;G11C7/00;G11C11/401;G11C11/408;G11C11/409;G11C16/06;H01L27/10 主分类号 G11C17/00
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