| 摘要 |
PURPOSE:To relieve the processing of an image sensor side by providing a sample and hold means for an input voltage, a subtraction means subtracting another input voltage and a voltage subject to sample and hold by a sample and hold means, and an A/D conversion circuit applying A/D conversion to the output of the subtraction means on one and same chip. CONSTITUTION:A sample and hold means sampling and holding an input voltage, a subtraction means 205 subtracting another input voltage and a voltage subject to sample and hold by the sample and hold means and an A/D conversion circuit 206 applying A/D conversion to the output of the subtraction means 205 are provided on one and same chip. The sample and hold means consists of a FET 201, a capacitor 202 and a buffer 203. Thus, the chip area of the image sensor is reduced, the difference between the effective picture element output and the black reference picture element output is taken by the A/D converter and the difference is subject to A/D conversion, then the output processing at the image sensor side is reduced and its circuit constitution is simplified. |
