发明名称 INTEGRATED CIRCUIT
摘要 <p>PURPOSE:To read the contents of the RAM for the temporary storage of a microprocessor without the intervention of the microprocessor by stopping the action of the microprocessor when a specific signal is inputted to a control terminal, and switching data inputted from a data bus to a mode inputted to the RAM. CONSTITUTION:A microprocessor 10, a buffer circuit 40, a data selecting circuit 50 and an address selecting circuit 20 are connected in common by a control line, and the control line is connected to a control terminal 400. When the specific signal is inputted to the control terminal 400, the action of the microprocessor 10 is stopped, the address selecting circuit 20 inputs address data inputted from an address bus 200, to a random access memory (RAM) 30, and the data selecting circuit 50 is switched to the mode to input the data inputted from a data sub 300 to the RAM 30. Thus, without the intervention of the microprocessor 10, the contents of the RAM 30 for the temporary storage of the microprocessor 10 can be read.</p>
申请公布号 JPH01205257(A) 申请公布日期 1989.08.17
申请号 JP19880028698 申请日期 1988.02.12
申请人 NEC CORP 发明人 OSHIMA SHIGERU
分类号 H01L27/04;G06F15/78;H01L21/822;H01L27/10 主分类号 H01L27/04
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