| 摘要 |
<p>In an intermediate frequency amplification circuit comprising first through n-th differential amplifiers which are connected in cascade to one another with the first amplifier supplied with a circuit input signal and which successively produce amplifier output signals with an n-th amplifier output signal produced as a circuit output signal from the n-th amplifier, first through (n+1)-th rectification circuits are supplied with the respective amplifier output signals with the circuit input signal given to the first rectification circuit. Each rectification circuit comprises a differential unit comprising at least one pair of transistors have different emitter areas from each other to rectify each amplifier output signal and to produce a collector current which is summed up by an adder circuit to be produced as a field strength signal. The rectification circuits may carry out either half-wave rectification or full-wave rectification. A plurality of the above-mentioned pairs may be included in each rectification circuit.</p> |
