发明名称 FORMATION OF A PLURALITY OF MULTIPLE PROCESSOR SYSTEM
摘要 PURPOSE: To execute irregular and complicated calculation processing at high speed by arraying regularly processor systems to execute arbitrary processing, and connecting an interval between each processing system and another through a two-port memory. CONSTITUTION: In the processor system to be a module type element, a processor 24 executes each calculation processing while transferring data 26, an address 28 and control 30 with a ring bus 32. Then, since each processor system can transmit and receive the data to/from other processor system whose number of sets is an arbitrary number 4 and below through the two-port memory 38, the complicated calculation processing can be executed. Besides, since only two sets of the processors are connected to the two-port memory, arbitration at the time when it is accessed is easy.
申请公布号 JPH01199260(A) 申请公布日期 1989.08.10
申请号 JP19870274602 申请日期 1987.10.29
申请人 UNITED TECHNOL CORP <UTC> 发明人 BARUCHIYANDORA RAMUCHIYANDORA TARUPIYUURU;ROBAATO II KORINZU
分类号 G06F15/173;G06F9/44;G06F15/80 主分类号 G06F15/173
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