| 摘要 |
<p>PURPOSE:To read data at a high speed in a serial access mode by providing a shift register to which a sense amplifier output is inputted, and sensing the contents of the memory cell of a next address by means of a sense amplifier while the contents of the shift register are outputted. CONSTITUTION:The semiconductor memory has a shift register 17, a column address generating circuit 18, and transistors 19 to control the inputs of the sense amplifier outputs to the shift register 17, and a transfer control signals is inputted to gates. A memory array is divided into plural blocks, and respective column decoders 6 have the same circuit constitution. Namely, the shift register 17 is provided, respective memory blocks are simultaneously read, sense amplifier 15 outputs are inputted to the shift register 17, and simultaneously, the contents of the shift register 17 are read as to a next column address in a cycle outputted from an output buffer 16. Thus, respective memory blocks are simultaneously read in the serial access mode, and the reading of the data is made high-speed in comparison to the case of an ordinary mode.</p> |
