| 摘要 |
A self-biasing inverter circuit comprises a load device and a semiconductor driving field effect transistor connected in series with a low-impedance device across a voltage source. The input is impressed on the gate terminal of the driving FET and the output is taken off the junction between the driving FET and the load device. A second field effect transistor having a high output impedance is connected between the source of the driving FET and the negative side of the voltage source and has its gate terminal connected to the inverter output. In this manner the source of the driving FET is biased to a negative voltage level sufficient to maintain said driving FET in the nonconductive state even for logic "O" signal more negative than threshold. In addition the bias signal is automatically diminished as a logic "1" input is impressed on the gate of the driving FET to aid in rendering the driving FET conductive.
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