| 摘要 |
<p>Integrated circuit comprising logic circuits and at least one push-pull stage. In order to reduce the magnitude of induction voltages on power supply lines (VDD, VSS) of the circuit, caused by the current variations in a push-pull stage comprising a push transistor (T1) and a pull transistor (T2), in accordance with the invention a first current through one transistor is kept substantially constant until after a most significant rise of a second current through the other transistor when the push-pull stage is switched. A push-pull stage having a less-disturbing switching behaviour can thus be realized without affecting the speed. Aspects of the invention concern the construction of the control means for the push and pull sections of the stage.</p> |
