| 摘要 |
An electronic circuit is tested by applying a sequence of test vectors to the input port of the circuit as a plurality of sub-sequences each including at least one test vector. Serial scan vectors provided at a serial scan port of the circuit are examined after each sub-sequence, and determination is made as to whether a part of the serial scan vector indicates the presence of a defect in the circuit. In the event that a part of the serial scan vector indicates the presence of a defect in the circuit, information that identifies the number of serial scan vectors that have previously been examined and the part of the serial scan vector that indicates the presence of a defect in the circuit is made available for analysis.
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