发明名称 PHASE LOCKED LOOP DEVICE
摘要 <p>PURPOSE:To reduce a hardware, to save a space and to decrease a cost by using the character of a ternary synchronizing type high vision video signal and obtaining the edge of a reference point concerning a video device. CONSTITUTION:A video pulse 60 after a direct current is reproduced is inputted to a sample-and-hold circuit 61. The sample-and-hold circuit 61 removes the video pulse 60 after the direct current reproduction by a horizontal synchronizing pulse 66 inputted separately and holds only one line. Further, a held signal 67 is inputted to the voltage control terminal of an oscillator 62 and the oscillation frequency of a clock pulse pulse 63 is controlled. Thus, the sample-and-hold circuit 61, the oscillator 62 and a counter 64 constitute the feedback loop, and the leading edge from a negative potential to a positive potential for the video pulse 60 after the direct current reproduction is limited to the edge only of the reference point of the horizontal synchronization.</p>
申请公布号 JPH01194694(A) 申请公布日期 1989.08.04
申请号 JP19880017127 申请日期 1988.01.29
申请人 NEC CORP 发明人 TAKIMOTO HIDEKI
分类号 H04N5/04;H04N19/00 主分类号 H04N5/04
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