发明名称 FRAME SYNCHRONIZATION DETECTING CIRCUIT
摘要 PURPOSE:To obtain a stable and highly reliable synchronization probability by executing the feedback of information to a frame synchronization processing part, and executing frame synchronization detection again when a frame synchronous condition is established and a super-frame synchronous condition is not detected. CONSTITUTION:The title device is constituted so that a frame synchronization processing part 16 may detect the frame synchronous code of a frame synchronization block, and a super-frame synchronization processing part 18 may detect a super-frame synchronous code, and a feedback circuit 50 is provided which makes the frame synchronization processing part 16 into a queuing condition so that the frame synchronization processing part 16 may detect the frame synchronous code again when the super-frame synchronization processing part 18 does not detect the frame synchronous code, and even when the frame synchronization processing part 16 is in the condition to have detected the frame synchronous code. Further, the information of the condition (when the condition is shifted from the frame synchronous condition to a frame asynchronous condition, and from the asynchronous condition to the synchronous condition) of the frame synchronization processing part also is transmitted to the super-frame synchronization processing part 18, and the synchronization establishment of the super-frame synchronization processing part 18 is made safe.
申请公布号 JPH01194625(A) 申请公布日期 1989.08.04
申请号 JP19880017210 申请日期 1988.01.29
申请人 TOSHIBA CORP 发明人 OKITA SHIGERU
分类号 H04L7/08 主分类号 H04L7/08
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