| 摘要 |
PURPOSE:To accelerate switching speed by providing two switching transistors controlled by an input signal and output the output of a delay circuit to the other end of a coupling capacitor. CONSTITUTION:By impressing HIGH(H) and LOW(L) on the control signals Q1 and Q2 of a transmission gate, respectively when input 1 changes from the L to the H, nodes N1 and N2 go to the Hs, and a PMOS FETT is de-energized and an NMOSFETT2 is energized, then, output O goes to the L. In such a case, a node N3 is inputted to the delay circuit F, and changes to the M after being delayed from the input signal I by a prescribed time. And when the node N3 changes to the H, the potential of the node Ny rises by coupling by the capacitor C2 attached between the nodes N2 and N3. In such a way, it is possible to increase the mutual conductance gm of the NNOSFETT2, and to accelerate the fall time of the output O. |
