| 摘要 |
PURPOSE:To perform an address scramble extending over X- and Y-addresses, by sending out one bit indicated by the input from a programmable counter from the address pattern inputted to a selection circuit. CONSTITUTION:When four-bit X- and Y-address patterns 4, 5 are inputted to a selection circuit 1, a programmable counter 2 may output three bits. At first, data is set to the register 3a in a control circuit from a CPU and a load signal is outputted to the counter 2 to select a predetermined bit. Eight circuits (the total number of bits) thus constituted are provided with respect to the respective pins to make it possible to perform address scramble extending over X- and Y-addresses. The operation of the counter 2 stores input data when the load signal is inputted and outputs the same as it is. Further, a clock is inputted to the counter 2 from the control circuit and counted under the condition preset from CPU to change the output of the counter 2 to allow the selection circuit 1 to perform desired selection. |
