摘要 |
In a data processing system, a simple, fast entry of characters into the image memory (BS) can be achieved if the image memory (BS) consists of two identical, separately addressable memory halves (L, H), and is addressable on a bit basis. For entering a character, a pixel address, which consists of a word address (M) and a pixel number (N), is prescribed via an address register (AR). Using the word address (M), two adjacent memory positions of the two memory halves (L, H) of the image memory (BS) are addressed via an address control unit (AS). Corresponding to the pixel number (N), the line of characters to be entered from the character memory (ZS) is rotated in a barrel shifter (B), and applied to the data inputs of both memory halves (L, H) of the image memory (BS). A write mask decoder (SD) generates a 2 x bit wide write mask from the pixel number (N) and the prescribed write width. Using this write mask, a write control unit (ST) releases the corresponding binary positions within the addressed memory positions of the image memory (BS) to receive the data bits present. Because of the division of the image memory (BS) into two memory halves (L, H), a line of characters can be entered even if it exceeds the word limits of a memory half (L, H). <IMAGE>
|
申请人 |
SIEMENS AG, 1000 BERLIN UND 8000 MUENCHEN, DE |
发明人 |
KERN, GUENTER, DIPL.-ING., 7500 KARLSRUHE, DE |