| 摘要 |
PURPOSE:To reduce power consumption and to prevent occurrence of malfunction of a digital integrated circuit by supplying a drive signal respectively to two MOS transistors(TRs) having a smaller ON-resistance and larger drive capability than those of the 2nd and 3rd logic gates receiving an output signal of the 1st logic gate and an input signal and using the 1st and 2nd capacitors for a current source output signal transition. CONSTITUTION:When an input signal INI transits to a high logic level VDD, inputs to a NAND gate 3 go both a high logic level VDD and an output signal (b) of the NAND gate 3 transits to a low logic level GND. Thus, a P-channel MOS TR 1 is turned on and an output signal OUT1 transits to a high logic level VDD by the discharge from the 1st capacitor 61. Then either of the MOS TRs 1, 2 turned on by the transition of the output signal OUT1 is turned off. Thus, a through-current I2 flowing through the MOS TRs 11, 1 and 2, 12 is lost. Thus, the power consumption is reduced and not a large temporary current flows to a power wiring, then malfunction is prevented. |
