| 摘要 |
A multiplier multiplies first binary data X and second binary data Y in 2' complement format, X=(X4, X3, X2, X1) and Y=(Y4, Y3, Y2, Y1) to obtain the product Q=(Q4, Q3, Q2, Q1). An adder/subtractor performs addition/subtraction of third binary data Q'=(Q4, Q3, &upbar& Q, &upbar& Q) and fourth binary data Z=(Z4, Z3, Z2, Z1) in 2's complement format in response to a control signal. The third binary data includes upper bits and lower bits. The upper bits includes the upper two bits Q4 and Q3 of the multiplication result Q=(Q4, Q3, Q2, Q1). The lower two bits include the inverted most significant bit &upbar& Q of the multiplication result. When the adder/subtractor operates in the adder mode, the inverted most significant bit &upbar& Q of the multiplication result is applied as a carry input to the adder/subtractor. In the subtractor mode, the most significant bit Q4 of the multiplication result is applied as a carry bit to the adder/subtractor.
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