HIGH-PERFORMANCE DRAM ARRAYS INCLUDING TRENCH CAPACITORS

摘要

HIGH-PERFORMANCE DRAM ARRAYS INCLUDING TRENCH CAPACITORS Parallel elongated trenches in a silicon substrate are utilized to form multiple distinct memory cell capacitors on each continuous wall of each trench. Chanstops are formed between adjacent capacitors to achieve electrical isolation. A separate word line overlies each trench wall and is connected via respective MOS transistors to the spaced-apart capacitors formed on the wall. A reliable high-density memory characterized by excellent performance is thereby realized.