| 摘要 |
PURPOSE:To decrease energy consumption by making a switching circuit to connect plural sub-bit lines to the main bit line into a circuit constitution to selectively connect the desired sub-bit line at the desired main bit line to the main bit line. CONSTITUTION:Four sub-bit line pairs SBLi1 and inverted SBLi1-SBLi4 and inverted SBLi4 share one main bit line pair MBLi and inverted MBLi, and four mats are constituted for a whole memory cell array. The sub-bit line pairs are respectively and commonly connected through selective switching circuit 20 to the main bit line pair. The circuit 20 is constituted by MOSFETQ1-Q4 so that the desired sub-bit line pairs at the desired main bit line pair may be selectively conducted to the desired main bit line pair, and the circuit has a function, which can non-conductively control the selected individual sub-bit line pairs to the main bit line, in addition to a mat selecting function, which selects the sub-bit line pairs sharing a word line and the main line pairs at the ratio of 1:1 together with the sub-bit line pairs including the memory cell selected based on the word line selective signal. |
