| 摘要 |
PURPOSE:To cause a design change to be efficient by preparing the number of stages of an inverter circuit on a layout in consideration for the accuracy of the design and the dispersion of a process parameter, etc., beforehand, and correcting a mask to connect the output of the inverter circuit and an external wiring. CONSTITUTION:The title circuit is composed of plural inverter circuits 3 to be connected in series, and the position of an opening 1 for a connection on the wiring to obtain an output signal 5 in an initial design is made into an electric connecting point. On the other hand, when, in a real device, the delaying quantity of the output signal 5 to an input signal 4 is measured, a value is made larger than a designed value and that the design change is needed is known, it is sufficient that a mask for a contact is corrected so as to be made into the optimum correction position of the opening for the connection for obtaining a delay time DELTAt on the design, for example, the opening for the connection indicated by 2. Respective inverter circuits in the signal delaying circuit composed of plural inverter circuits do not necessarily need to use equal circuits, equal transistors, etc. |
