| 摘要 |
PURPOSE:To cause a switching action to be high-speed and to cause a layout area to be small by composing a buffer of transmission gates, inverters, pull-up and pull-down transistors, etc., without using a NAND gate and a NOR gate. CONSTITUTION:When a 'LOW' is inputted from an enable signal input terminal 12, transmission gates 1 and 2 are made into non-energized states, a 'HIGH' and the 'LOW' are inputted to pull-down and pull-up transistors 3 and 4, respectively, and they are made into conductive states. For such a reason, to P and N type MOS transistors 7 and 8 to pass respective inverters 5 and 6, the 'HIGH' and 'LOW' are inputted, respectively, they are both made into the non-energized states, and an output terminal 18 is made into a high impedance state. On the other hand, when the 'HIGH' is inputted from the enable signal input terminal 12, data D from a data input terminal 11 are outputted in paths of the transmission gate 1 inverter 5 P type MOS transistor 7 and of the transmission gate 2 inverter 6 N type MOS transistor 8, and a delay necessary for it is improved. |
