发明名称 Load-relief network for branch pairs, which are free of off-state voltage, of a multiphase converter
摘要 Electronic power circuits using GTO thyristors (T1...T6) or transistors as controllable electronic switches require a load-relief network for operation, which network delays the current rise during switching on and the voltage rise during switching off. In detail, a switching-off load-relief capacitor (CEA, CEB, CEC) and two switching-off load-relief diodes (D1...D6) are provided per branch pair, as well as a load-relief resistor (RO) or DC/DC voltage converter (4) which is common to all branch pairs (1, 2, 3). In order reliably to prevent dangerous voltage spikes when switching the GTO thyristors off, it is proposed to provide a dedicated storage capacitor (CPA, CPB, CPC) per branch pair and to arrange one decoupling diode (DA, DB, DC) in each case between the load-relief resistor (RO) and the individual storage capacitors. As an alternative to this, the DC/DC voltage converter (4) can also be constructed as a voltage-stabilising energy recovery transformer (feedback transformer). <IMAGE>
申请公布号 DE3801327(A1) 申请公布日期 1989.07.27
申请号 DE19883801327 申请日期 1988.01.19
申请人 ASEA BROWN BOVERI AG, 6800 MANNHEIM, DE 发明人 LANGER, JOHANNES GEORG, DIPL.-ING.;FREGIEN, GERT, DIPL.-ING., 5100 AACHEN, DE
分类号 H02M7/521 主分类号 H02M7/521
代理机构 代理人
主权项
地址