发明名称 SYNCHRONOUS ENCODER
摘要 <p>SYNCHRONOUS ENCODER A synchronous encoder includes a 3-stage shift register, polarity control circuits, output gates, and unipolar-to-bipolar converter for producing a B3ZS bipolar signal from a binary input data signal. A detector detects occurrences of three consecutive zeros in the data signal, and upon each such detection modifies the data passing through the shift register to produce a desired bipolar code violation pulse and clears a parity circuit. The parity circuit controls the output gates to maintain an odd number of pulses between successive violation pulses of the bipolar signal.</p>
申请公布号 CA1257933(A) 申请公布日期 1989.07.25
申请号 CA19870530625 申请日期 1987.02.25
申请人 NORTHERN TELECOM LIMITED 发明人 KONARSKI, MAREK A.
分类号 H03M5/18;H04L25/49;(IPC1-7):H04M5/04 主分类号 H03M5/18
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