发明名称 Low voltage current limit loop
摘要 A current limit circuit is provided which may be used to limit the current conducted by a pass transistor in a low dropout voltage regulator circuit having no ground terminal. The output current of the regulator is sensed by a low value resistor in the collector of the transistor. The voltage developed across the resistor is proportional to the output current of the regulator, and is used to vary a current ratio which sets the current limit value. The gain of the current limit loop is increased by providing positive feedback during current limiting. A foldback network is provided which reduces the current limit value at higher input/output voltage differentials. The feedback provided by the foldback network has a breakpoint which is sensitive to the operating temperature of the regulator circuit.
申请公布号 US4851953(A) 申请公布日期 1989.07.25
申请号 US19870114219 申请日期 1987.10.28
申请人 LINEAR TECHNOLOGY CORPORATION 发明人 O'NEILL, DENNIS P.;NELSON, CARL T.
分类号 G05F1/573 主分类号 G05F1/573
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