| 摘要 |
<p>An analog to digital or digital to analog converter comprising, a signal input terminal, a integrator connected to the signal input terminal, a plurality of constant current sources connected to the integrator so that the integrator is supplied with respective constant currents, a first counter having a first predetermined number of bits for higher significant bits, a second counter having a first predetermined number of bits for lower significant bits, and clock signal generator for generating a first clock signal having a first clock frequency and supplied to the first counter and a second clock signal having a second frequency higher than the first clock frequency and supplied to the second counter, respective currents of the plurality of constant current sources are determined according to the first and second predetermined number of bits and the first and second clock frequency of the first and second clock signals, respectively.</p> |
