| 摘要 |
PURPOSE:To prevent the generation of miswriting due to finely-divided elements in a read-only memory having a floating gate and a control gate by setting up the timing of the impression of voltage to the control gate at the time of data reading prior to the impression of voltage between a drain and a source. CONSTITUTION:Respective n<+> type diffusion layers 2, 3 to be used as a source and a drain are formed on the surface of a p<-> type Si substrate 1 at an interval and the floating gate 5 and the control gate 6 are arranged on a channel area between these diffusion layers 2, 3 through a gate insulating film 4. An insulat ing film 7 is formed so as to cover the whole substrate and contact holes are formed on the film 7 to form necessary terminal electrodes 8-10. The control gates 6 arranged in one direction of a memory array are connected to a word line in common and sources or drains arranged in the crossing direction are connected to a bit line in common. Even when fine elements are used, miswriting at the time of reading can be surely suppressed and a highly reliable read-only memory can be obtained. |
