| 摘要 |
PURPOSE:To shorten transfer time by transferring data of a local data bus to a common data bus through a switching circuit of a MIS transistor Tr after amplifying the current of this data by a bipolar Tr. CONSTITUTION:In case of data transfer, a selection signal BS1 is set to a low level and nMISFETs QN11 and QN12 are turned off and PMISFETs QP11 and QP12 are turned on. At this time, data on local data busses DB1 and the inverse of DB1 immediately appear on common data busses DB and the inverse of DB after having currents amplified through PMISFETs QP11 and QP12 from bases of bipolar Trs QB11 and QB12. When data transfer will be inhibited, the signal BS1 is set to a high level and nMISFETs QN11 and QN12 are turned on and PMISFETs QP11 and QP12 are turned off. Then, bipolar Trs QB11 and QB12 are short-circuited between bases and emitters and data from data busses DB1 and the inverse of DB1 are completely cut off. Thus, the data transfer time is shortened. |
